Lee-Sup Kim

Available identifiers

Publication	Date of Publication	Type
Rare Computing: Removing Redundant Multiplications From Sparse and Repetitive Data in Deep Neural Networks	2022-08-05	Paper
A Deep Neural Network Training Architecture With Inference-Aware Heterogeneous Data-Type	2022-08-05	Paper
S-FLASH: A NAND Flash-based Deep Neural Network Accelerator Exploiting Bit-level Sparsity	2022-08-05	Paper
Amnesiac DRAM: A Proactive Defense Mechanism Against Cold Boot Attacks	2022-03-23	Paper
A 5.4-Gb/s Clock and Data Recovery Circuit Using Seamless Loop Transition Scheme With Minimal Phase Noise Degradation	2021-08-26	Paper
A 9.6 Gb/s 0.96 mW/Gb/s Forwarded Clock Receiver With High Jitter Tolerance Using Mixing Cell Integrated Injection-Locked Oscillator	2021-08-26	Paper
A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme	2021-08-26	Paper
DC-PCM: Mitigating PCM Write Disturbance with Low Performance Overhead by Using Detection Cells	2020-01-28	Paper
Sparse-Insertion Write Cache to Mitigate Write Disturbance Errors in Phase Change Memory	2019-08-13	Paper
Rank-Level Parallelism in DRAM	2017-09-21	Paper
DRAM-Latency Optimization Inspired by Relationship between Row-Access Time and Refresh Timing	2017-05-16	Paper
Q-DRAM: Quick-Access DRAM with Decoupled Restoring from Row-Activation	2017-05-16	Paper
https://portal.mardi4nfdi.de/entity/Q4328618	2002-04-28	Paper
https://portal.mardi4nfdi.de/entity/Q4735376	1987-01-01	Paper
https://portal.mardi4nfdi.de/entity/Q3834288	1986-01-01	Paper

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