A 5.4/2.7/1.62-Gb/s Receiver for DisplayPort Version 1.2 With Multi-Rate Operation Scheme

DOI10.1109/TCSI.2012.2206456zbMATH Open1468.94687OpenAlexW1987981088MaRDI QIDQ5010490FDOQ5010490

Authors: Won-Young Lee, Kyu-Dong Hwang, Lee-Sup Kim 

Publication date: 26 August 2021

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/tcsi.2012.2206456

Mathematics Subject Classification ID

Analytic circuit theory (94C05)

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