Saeid Gorgin

Available identifiers

zbMath Open gorgin.saeidMaRDI QIDQ305059

List of research outcomes

Publication	Date of Publication	Type
Redundant-Digit Floating-Point Addition Scheme Based on a Stored Rounding Value	2017-07-27	Paper
Comment on “High Speed Parallel Decimal Multiplication With Redundant Internal Encodings”	2017-05-16	Paper
Efficient ASIC and FPGA implementation of binary-coded decimal digit multipliers	2016-08-26	Paper
An improved maximally redundant signed digit adder	2010-05-27	Paper
A Nonspeculative Maximally Redundant Signed Digit Adder	2009-05-20	Paper

Research outcomes over time

This page was built for person: Saeid Gorgin