Ángel Benito Rodríguez Vázquez

Available identifiers

Publication	Date of Publication	Type
Arrayable Voltage-Controlled Ring-Oscillator for Direct Time-of-Flight Image Sensors	2021-08-26	Paper
Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm	2021-08-26	Paper
Highly Linear 2.5-V CMOS>tex<$Sigma Delta $>/tex<Modulator for>tex<$hboxADSL+$>/tex<	2017-10-04	Paper
Device-level modeling and synthesis of high-performance pipeline ADCs.	2011-03-16	Paper
ECCTD 2007 Special Issue ‘Bridging Technology Innovations to Foundations’	2009-03-24	Paper
IMPLEMENTING THE MULTILAYER RETINAL MODEL ON THE COMPLEX-CELL CNN-UM CHIP PROTOTYPE	2005-03-08	Paper
ACE4k: An analog I/O 64×64 visual microprocessor chip with 7‐bit analog accuracy	2002-07-11	Paper
A behavioural modelling technique for visual microprocessor mixed‐signal VLSI chips	2002-07-11	Paper
SIRENA: A CAD environment for behavioural modelling and simulation of VLSI cellular neural network chips	1999-09-13	Paper
Design considerations for integrated continuous-time chaotic oscillators	1998-12-21	Paper
On a class of SC resistors and its application to the synthesis of non-linear driving-point and transfer-characteristic plots	1985-01-01	Paper
Static global models for linear n-port networks realized with operational amplifiers	1985-01-01	Paper

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