Transistor-Level Synthesis of Pipeline Analog-to-Digital Converters Using a Design-Space Reduction Algorithm

DOI10.1109/TCSI.2011.2157746zbMATH Open1468.94785MaRDI QIDQ5010801FDOQ5010801

Authors: Jesús Ruiz-Amaya, Manuel Delgado-Restituto, Ángel Benito Rodríguez Vázquez 

Publication date: 26 August 2021

Published in: IEEE Transactions on Circuits and Systems I: Regular Papers (Search for Journal in Brave)

Mathematics Subject Classification ID

Analytic circuit theory (94C05) Applications of design theory to circuits and networks (94C30)

Cited In (1)

• Programmable ANalog Device Array (PANDA): A Methodology for Transistor-Level Analog Emulation

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