Jon G. Bredeson

Available identifiers

zbMath Open bredeson.jon-gMaRDI QIDQ3877579

List of research outcomes

Publication	Date of Publication	Type
Minimal Redundant Logic for High Reliability and Irredundant Testability	1980-01-01	Paper
A Method to Simplify a Boolean Function into a Near Minimal Sum-of-Products for Programmable Logic Arrays	1978-01-01	Paper
Comments on "Synthesis of Multiple-Input Change Asynchronous Machines Using Controlled Excitation and Flip-Flops"	1975-01-01	Paper
Synthesis of Multiple-Input Change Asynchronous Circuits Using Transition-Sensitive Flip-Flops	1973-01-01	Paper
Elimination of static and dynamic hazards for multiple input changes in combinational switching circuits	1972-01-01	Paper
Generation of Prime Implicants by Direct Multiplication	1971-01-01	Paper
Generation of a Clock Pulse for Asynchronous Sequential Machines to Eliminate Critical Races	1971-01-01	Paper
Ternary graph theoretic error-correcting codes (Corresp.)	1969-01-01	Paper
Graph theoretic error-correcting codes	1968-01-01	Paper
Decoding of graph theoretic codes (Corresp.)	1967-01-01	Paper

Research outcomes over time

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