Chaitali Chakrabarti

Available identifiers

zbMath Open chakrabarti.chaitaliMaRDI QIDQ850164

List of research outcomes

Publication	Date of Publication	Type
Multidimensional DFT IP Generator for FPGA Platforms	2021-08-26	Paper
Configurable-ECC: Architecting a Flexible ECC Scheme to Support Different Sized Accesses in High Bandwidth Memory Systems	2019-08-13	Paper
Systolic architectures for the computation of the discrete Hartley and the discrete cosine transforms based on prime factor decomposition	2018-09-14	Paper
Efficient Bayesian Tracking of Multiple Sources of Neural Activity: Algorithms and Real-Time FPGA Implementation	2018-08-22	Paper
Architecture-Aware LDPC Code Design for Multiprocessor Software Defined Radio Systems	2018-07-09	Paper
A Distributed Canny Edge Detector: Algorithm and FPGA Implementation	2017-11-20	Paper
An Approach for Adaptively Approximating the Viterbi Algorithm to Reduce Power Consumption While Decoding Convolutional Codes	2017-09-20	Paper
An Automated Framework for Accelerating Numerical Algorithms on Reconfigurable Platforms Using Algorithmic/Architectural Optimization	2017-08-08	Paper
Using Low Cost Erasure and Error Correction Schemes to Improve Reliability of Commodity DRAM Systems	2017-05-16	Paper
A coprocessor architecture for fast protein structure prediction	2006-11-15	Paper
A survey on lifting-based discrete wavelet transform architectures	2006-10-25	Paper
Memory design and exploration for low power, embedded systems	2002-05-30	Paper
A new architecture for the Viterbi decoder for code rate \(k/n\)	2002-02-01	Paper
Comments on "Highly modular systolic structures for denominator-separable 2-D recursive filters" [with reply]	1993-08-16	Paper

Research outcomes over time

This page was built for person: Chaitali Chakrabarti