Process specification and verification

DOI10.1007/3-540-61228-9_90MaRDI QIDQ4645279zbMATH OpenOpenAlexFDO

Authors Klaus Barthelmann

Publication date 10 January 2019

Published in Lecture Notes in Computer Science (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/3-540-61228-9_90

zbMATH Keywords

temporal logicpredicate logicgraph grammarprecise formulagraph expression

Mathematics Subject Classification ID

Grammars and rewriting systems (68Q42) Specification and verification (program logics, model checking, etc.) (68Q60) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)

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Cites work

• scientific article; zbMATH DE number 3980467 (Why is no real title available?)
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• scientific article; zbMATH DE number 42752 (Why is no real title available?)
• scientific article; zbMATH DE number 107681 (Why is no real title available?)
• A calculus of mobile processes. II
• A comparison of compatible, finite, and inductive graph properties
• Amalgamation of graph transformations: a synchronization mechanism
• Graph expressions and graph rewritings
• Plain CHOCS. A second generation calculus for higher order processes

Cited in

(14)

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• Linear-Ordered Graph Grammars: Applications to Distributed Systems Design
• Specification patterns for properties over reachable states of graph grammars
• Theorem proving graph grammars: strategies for discharging proof obligations
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• Verification of graph grammars using a logical approach
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• Logic-based verification of the distributed dining philosophers protocol
• Verification of distributed object-based systems.
• Formal verification of graph grammars using mathematical induction
• scientific article; zbMATH DE number 3878341 (Why is no real title available?)
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