The performance of multilective VLSI algorithms
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Publication:1069297
DOI10.1016/0022-0000(84)90033-3zbMATH Open0583.68021OpenAlexW2083381826MaRDI QIDQ1069297FDOQ1069297
Publication date: 1984
Published in: Journal of Computer and System Sciences (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/0022-0000(84)90033-3
Cites Work
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- A Separator Theorem for Planar Graphs
- Time-space tradeoffs for computing functions, using connectivity properties of their circuits
- Computational Work and Time on Finite Machines
- Area-time optimal VLSI networks for multiplying matrices
- Area-time tradeoffs for matrix multiplication and related problems in VLSI models
- Information transfer and area-time tradeoffs for VLSI multiplication
- The Area-Time Complexity of Binary Multiplication
- Space-time trade-offs on the FFT algorithm
- Space-Time Trade-Offs for Banded Matrix Problems
Cited In (6)
- Branching programs provide lower bounds on the area of multilective deterministic and nondeterministic VLSI circuits
- Communication Complexity and Lower Bounds on Multilective Computations
- Planar acyclic computation
- Two tapes versus one for off-line Turing machines
- Multilevel optimization in VLSICAD
- On the complexity of planar Boolean circuits
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