The performance of multilective VLSI algorithms
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Cites work
- scientific article; zbMATH DE number 3532851 (Why is no real title available?)
- scientific article; zbMATH DE number 3566175 (Why is no real title available?)
- scientific article; zbMATH DE number 3628386 (Why is no real title available?)
- scientific article; zbMATH DE number 3449757 (Why is no real title available?)
- A Separator Theorem for Planar Graphs
- Area-time optimal VLSI networks for multiplying matrices
- Area-time tradeoffs for matrix multiplication and related problems in VLSI models
- Computational Work and Time on Finite Machines
- Information transfer and area-time tradeoffs for VLSI multiplication
- Space-Time Trade-Offs for Banded Matrix Problems
- Space-time trade-offs on the FFT algorithm
- The Area-Time Complexity of Binary Multiplication
- Time-space tradeoffs for computing functions, using connectivity properties of their circuits
Cited in
(6)- Branching programs provide lower bounds on the area of multilective deterministic and nondeterministic VLSI circuits
- Communication Complexity and Lower Bounds on Multilective Computations
- Planar acyclic computation
- Two tapes versus one for off-line Turing machines
- Multilevel optimization in VLSICAD
- On the complexity of planar Boolean circuits
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