A new VLSI system for adaptive recursive filtering

DOI10.1016/0167-8191(89)90082-3MaRDI QIDQ1123556zbMATH OpenOpenAlexFDO

Authors Kam Hoi Cheng, Sartaj Sahni

Publication date 1989

Published in Parallel Computing (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/0167-8191(89)90082-3

zbMATH Keywords

adaptive recursive filteringsystolic algorithmVLSI architectures

Mathematics Subject Classification ID

Numerical optimization and variational techniques (65K10) Theory of operating systems (68N25) Filtering in stochastic control theory (93E11)

Review text

The adaptive recursive filtering problem is investigated. The input to this problem is a \(n\times w\) matrix of weighting coefficients and a \(1\times w\) vector. The output is a \(1\times n\) vector. A bidirectional chain VLSI system consisting of w processors is presented. The working of this system is described formally by a systolic algorithm. The improvement over previous designs is demonstrated by comparing different performance measures.

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• A One-Dimensional Analog VLSI Implementation for Nonlinear Real-Time Signal Preprocessing

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