Timing diagrams: Formalization and algorithmic verification

DOI10.1023/A:1008345113376zbMATH Open0941.03032MaRDI QIDQ1306169FDOQ1306169

Authors: Kathi Fisler 

Publication date: 22 September 1999

Published in: Journal of Logic, Language and Information (Search for Journal in Brave)

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zbMATH Keywords

model checkinghardware design\(\omega\)-regular languages[https://portal.mardi4nfdi.de/w/index.php?title=+Special%3ASearch&search=B%EF%BF%BD%EF%BF%BDchi+automata&go=Go B��chi automata]computer-aided verificationlanguage containmentreversal bounded counter machine languagestiming diagram logic

Mathematics Subject Classification ID

Automata and formal grammars in connection with logical questions (03D05) Specification and verification (program logics, model checking, etc.) (68Q60) Decidability of theories and sets of sentences (03B25) Logic in computer science (03B70) Mathematical problems of computer architecture (68M07)

Cited In (9)

• A graphic language based on timing diagrams
• Proving sequential function chart programs using timed automata
• Title not available (Why is that?)
• Title not available (Why is that?)
• Title not available (Why is that?)
• Reasoning about synchronization in GALS systems
• Towards diagrammability and efficiency in event sequence languages
• Correct Hardware Design and Verification Methods
• The Verus language: Representing time efficiently with BDDs

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