scientific article; zbMATH DE number 791802
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Publication:4845010
zbMATH Open0837.68046MaRDI QIDQ4845010FDOQ4845010
Authors: William K. C. Lam, Robert K. Brayton
Publication date: 30 August 1995
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timing analysiscircuit designhigh performance VLSI systemsperformance verification of systemstimed Boolean functions
Research exposition (monographs, survey articles) pertaining to computer science (68-02) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)
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- An analytical delay model
- Boolean process
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- Timing conditions for linearizability in uniform counting networks
- Constructive Boolean circuits and the exactness of timed ternary simulation
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