Constructive Boolean circuits and the exactness of timed ternary simulation

DOI10.1007/S10703-012-0144-6zbMATH Open1303.94148OpenAlexW1978909743MaRDI QIDQ453539FDOQ453539

Authors: Michael Mendler, Thomas R. Shiple, Gérard Berry 

Publication date: 27 September 2012

Published in: Formal Methods in System Design (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/s10703-012-0144-6

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zbMATH Keywords

constructive logiccombinational circuitsdelay modelsternary simulation

Mathematics Subject Classification ID

Specification and verification (program logics, model checking, etc.) (68Q60)

Cites Work

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• Hazards, critical races, and metastability
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• Characterising combinational timing analyses in intuitionistic modal logic
• Constructive Boolean circuits and the exactness of timed ternary simulation
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• Hazard Detection in Combinational and Sequential Switching Circuits
• Application of Ternary Algebra to the Study of Static Hazards
• A Note on Three-Valued Logic Simulation

Cited In (9)

• An optimistic ternary simulation of gate races
• Generalized ternary simulation of sequential circuits
• Denotational fixed-point semantics for constructive scheduling of synchronous concurrency
• Title not available (Why is that?)
• Constructive Boolean circuits and the exactness of timed ternary simulation
• Constructive semantics for instantaneous reactions
• Title not available (Why is that?)
• Title not available (Why is that?)
• Title not available (Why is that?)

Uses Software

• Esterel

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