An array of processors for the real-time estimation of fourth- and lower- order moments

DOI10.1016/0165-1684(94)90032-9zbMATH Open0805.68069OpenAlexW1972391208MaRDI QIDQ1324527FDOQ1324527

Authors: Haris M. Stellakis, Elias S. Manolakos 

Publication date: 26 January 1995

Published in: Signal Processing (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/0165-1684(94)90032-9

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zbMATH Keywords

real timeparallel processingVLSI designhigher-order statisticspipelininghigher order momentsapplication specific array processortriangular VLSI architecture

Mathematics Subject Classification ID

Circuits, networks (94C99) Network design and communication in computer systems (68M10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

Cited In (3)

• A new approach for the design of linear systolic arrays for computing third-order cumulants
• Implementation aspects of various higher-order statistics estimators
• Computation of higher-order cross moments based on matrix multiplication

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