Systematic synthesis of parallel architectures for the computation of higher order cumulants

DOI10.1016/S0167-8191(99)00125-8MaRDI QIDQ1978684zbMATH OpenFDO

Authors Elias S. Manolakos, Haris M. Stellakis

Publication date 4 June 2000

Published in Parallel Computing (Search for Journal in Brave)

zbMATH Keywords

parallel processinghigher order cummulantsVLSL architectures

Mathematics Subject Classification ID

Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.) (68Q10) Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.) (68W35)

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Cited in

(5)

• Parametric supplements to systems factorial analysis: identifying interactive parallel processing using systems of accumulators
• A systematic design of a parallel program for Dirichlet convolution
• A new approach for the design of linear systolic arrays for computing third-order cumulants
• Efficient Computation of Higher-Order Cumulant Tensors
• Implementation aspects of various higher-order statistics estimators

Describes a project that uses

Uses Software

• DG2VHDL

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