Processor-time tradeoffs under bounded-speed message propagation. I: Upper bounds

DOI10.1007/S002240000066MaRDI QIDQ1384682zbMATH OpenOpenAlexFDO

Authors Gianfranco Bilardi, F. P. Preparata

Publication date 25 May 1998

Published in Theory of Computing Systems (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1007/s002240000066

zbMATH Keywords

simulations of multiprocessor machinestopological separator

Mathematics Subject Classification ID

Computer system organization (68M99)

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• Lower bounds to processor-time tradeoffs under bounded-speed message propagation
• Processor-Ring Communication: A Tight Asymptotic Bound on Packet Waiting Times
• The cache complexity of multithreaded cache oblivious algorithms

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