Automatic synthesis of FPGA processor arrays from loop algorithms
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Publication:1425013
DOI10.1023/A:1024447517501zbMath1065.68120MaRDI QIDQ1425013
Publication date: 15 March 2004
Published in: The Journal of Supercomputing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1023/a:1024447517501
68W35: Hardware implementations of nonnumerical algorithms (VLSI algorithms, etc.)