TeLEx: learning signal temporal logic from positive examples using tightness metric
DOI10.1007/s10703-019-00332-1zbMath1425.68349OpenAlexW2912432686WikidataQ128544015 ScholiaQ128544015MaRDI QIDQ2008282
Natarajan Shankar, Susmit Jha, Tuhin Sahai, Sanjit A. Seshia, Ashish Kumar Tiwari
Publication date: 25 November 2019
Published in: Formal Methods in System Design (Search for Journal in Brave)
Full work available at URL: https://escholarship.org/uc/item/5sj2g464
autonomous systemspecification miningsignal temporal logiccyber-physical systeminterpretable machine learningtransparent machine learning
Learning and adaptive systems in artificial intelligence (68T05) Specification and verification (program logics, model checking, etc.) (68Q60) Temporal logic (03B44)
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