\textsf{LogStack}: stacked garbling with O(b b) computation

DOI10.1007/978-3-030-77883-5_1MaRDI QIDQ2056778zbMATH OpenOpenAlexFDO

Authors Vladimir Kolesnikov, David G. Heath

Publication date 8 December 2021

Full work available at URL https://doi.org/10.1007/978-3-030-77883-5_1

zbMATH Keywords

2PCconditional branchinggarbled circuitsstacked garbling

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

Cites work

• Efficient and scalable universal circuits
• Fast garbling of circuits under standard assumptions
• Free IF: how to omit inactive branches and implement \(\mathcal{S}\)-universal garbled circuit (almost) for free
• Improved Garbled Circuit: Free XOR Gates and Applications
• More efficient universal circuit constructions
• On the security of the ``Free-XOR technique
• Overlaying conditional circuit clauses for secure computation
• Stacked garbling for disjunctive zero-knowledge proofs
• Stacked garbling. Garbled circuit proportional to longest execution path
• Two halves make a whole: reducing data transfer in garbled circuits using half gates
• Universal circuits (Preliminary Report)
• Valiant's universal circuit is practical
• Valiant's universal circuits revisited: an overall improvement and a lower bound

Cited in

(7)

• Garbled circuits with sublinear evaluator
• Secure multiparty computation with free branching
• Speed-stacking: fast sublinear zero-knowledge proofs for disjunctions
• NanoGRAM: garbled RAM with \(\widetilde{O}(\log N)\) overhead
• Garbling, stacked and staggered. Faster \(k\)-out-of-\(n\) garbled function evaluation
• Garbled circuit lookup tables with logarithmic number of ciphertexts
• Silent circuit relinearisation: sublinear-size (Boolean and arithmetic) garbled circuits from DCR

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