Garbled circuits with sublinear evaluator
From MaRDI portal
Publication:2169991
DOI10.1007/978-3-031-06944-4_2zbMath1496.94048OpenAlexW4285140509MaRDI QIDQ2169991
Rafail Ostrovsky, Akash Shah, Vladimir Kolesnikov, Abida Haque, Steve Lu, David G. Heath
Publication date: 30 August 2022
Full work available at URL: https://doi.org/10.1007/978-3-031-06944-4_2
Related Items (1)
Uses Software
Cites Work
- Unnamed Item
- A proof of security of Yao's protocol for two-party computation
- Overlaying conditional circuit clauses for secure computation
- Free IF: how to omit inactive branches and implement \(\mathcal{S}\)-universal garbled circuit (almost) for free
- Private information retrieval with sublinear online time
- Stacked garbling for disjunctive zero-knowledge proofs
- \textsf{LogStack}: stacked garbling with \(O(b \log b)\) computation
- Stacked garbling. Garbled circuit proportional to longest execution path
- Three halves make a whole? Beating the half-gates lower bound for garbled circuits
- Pushing the limits of Valiant's universal circuits: simpler, tighter and more compact
- Turbospeedz: double your online SPDZ! Improving SPDZ using function dependent preprocessing
- Homomorphic Encryption from Learning with Errors: Conceptually-Simpler, Asymptotically-Faster, Attribute-Based
- How to Run Turing Machines on Encrypted Data
- FleXOR: Flexible Garbling for XOR Gates That Beats Free-XOR
- On the Security of the “Free-XOR” Technique
- Multiparty Computation from Somewhat Homomorphic Encryption
- Privacy-Free Garbled Circuits with Applications to Efficient Zero-Knowledge
- Two Halves Make a Whole
- Private information retrieval
- Improved Garbled Circuit: Free XOR Gates and Applications
- A Practical Universal Circuit Construction and Secure Evaluation of Private Functions
- Secure Two-Party Computation Is Practical
- Universal circuits (Preliminary Report)
- How to Garble RAM Programs?
- Fully homomorphic encryption using ideal lattices
- Efficient Fully Homomorphic Encryption from (Standard) LWE
This page was built for publication: Garbled circuits with sublinear evaluator