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Approximate evaluation of the efficiency of synchronous and self-timed methodologies in problems of designing failure-tolerant computing and control systems

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Publication:2139484
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DOI10.1134/S0005117922020084zbMATH Open1489.93079OpenAlexW4223506456MaRDI QIDQ2139484FDOQ2139484

Yu. V. Rogdestvenski, Yu. A. Stepchenkov, I. A. Sokolov, Yu. G. Diachenko

Publication date: 17 May 2022

Published in: Automation and Remote Control (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1134/s0005117922020084



zbMATH Keywords

hardwarefailureindicationsynchronous circuitfailure toleranceC-elementdual-rail signalself-timed circuit


Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12) Digital control/observation systems (93C62) Control/observation systems involving computers (process control, etc.) (93C83)


Cites Work

  • Title not available (Why is that?)
  • Fault-Tolerant Design







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