Automatic and hierarchical verification for concurrent systems
From MaRDI portal
Publication:2277847
DOI10.1007/BF02945312zbMath0725.68044MaRDI QIDQ2277847
Publication date: 1990
Published in: Journal of Computer Science and Technology (Search for Journal in Brave)
68Q10: Modes of computation (nondeterministic, parallel, interactive, probabilistic, etc.)
68Q85: Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.)
Cites Work
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- The temporal logic of branching time
- Hierarchical verification of asynchronous circuits using temporal logic
- Automatic verification of finite-state concurrent systems using temporal logic specifications
- Automatic Verification of Sequential Circuits Using Temporal Logic
- “Sometimes” and “not never” revisited