Easy and difficult exact covering problems arising in VLSI power reduction by clock gating

DOI10.1016/J.DISOPT.2014.08.004zbMATH Open1308.94124OpenAlexW1967794662MaRDI QIDQ2339838FDOQ2339838

Shmuel Wimer

Publication date: 9 April 2015

Published in: Discrete Optimization (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.disopt.2014.08.004

zbMATH Keywords

perfect matchingexact coveringclock-gatingVLSI power minimization

Mathematics Subject Classification ID

Graph theory (including graph drawing) in computer science (68R10) Vertex subsets with special properties (dominating sets, independent sets, cliques, etc.) (05C69) Applications of design theory to circuits and networks (94C30)

Cites Work

• Title not available (Why is that?)
• Blossom V: A new implementation of a minimum cost perfect matching algorithm
• Paths, Trees, and Flowers
• Set Partitioning: A survey
• Using well-solvable minimum cost exact covering for VLSI clock energy minimization
• On optimal flip-flop grouping for VLSI power minimization

Uses Software

• Blossom V

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