Probabilistic parallel prefix computation

DOI10.1016/0898-1221(93)90089-EzbMath0772.94019MaRDI QIDQ2367585

John H. Reif

Publication date: 2 September 1993

Published in: Computers \& Mathematics with Applications (Search for Journal in Brave)

zbMATH Keywords

error probabilityparallel evaluationfan-in circuitserror-free circuitsprobabilistic prefix computation problem

Mathematics Subject Classification ID

Error probability in coding theory (94B70)

Related Items

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Cites Work

• A lower bound for the length of addition chains
• Parallel Prefix Computation
• On the Time Required to Perform Addition
• On the Addition of Binary Numbers
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