Scalable FFT processors and pipelined butterfly units
From MaRDI portal
Publication:2432171
DOI10.1007/s11265-006-7265-3zbMath1138.94399OpenAlexW1991805453MaRDI QIDQ2432171
Konsta Punkka, Jarmo Henrik Takala
Publication date: 25 October 2006
Published in: Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s11265-006-7265-3
Cites Work
This page was built for publication: Scalable FFT processors and pipelined butterfly units