SMT-based scenario verification for hybrid systems
DOI10.1007/s10703-012-0158-0zbMath1284.03216WikidataQ62041178 ScholiaQ62041178MaRDI QIDQ2441772
Alessandro Cimatti, Sergio Mover, Stefano Tonetta
Publication date: 28 March 2014
Published in: Formal Methods in System Design (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/s10703-012-0158-0
message sequence charts; bounded model checking; k-induction; network of hybrid automata; SMT-based verification
68Q45: Formal languages and automata
03D05: Automata and formal grammars in connection with logical questions
68Q60: Specification and verification (program logics, model checking, etc.)
68T20: Problem solving in the context of artificial intelligence (heuristics, search strategies, etc.)
03B44: Temporal logic
03D78: Computation over the reals, computable analysis
Uses Software
