On the hardware implementation of RIPEMD processor: networking high speed hashing, up to 2 Gbps

DOI10.1016/J.COMPELECENG.2005.07.002MaRDI QIDQ2507331zbMATH OpenOpenAlexFDO

Authors Nicolas Sklavos, Odysseas Koufopavlou

Publication date 10 October 2006

Published in Computers and Electrical Engineering (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1016/j.compeleceng.2005.07.002

zbMATH Keywords

securityFPGA implementationdata hashingnetwork data integrity

Mathematics Subject Classification ID

Data encryption (aspects in computer science) (68P25) Computer system organization (68M99)

Recommendations

• Topics in Cryptology – CT-RSA 2004
• Implementation of the SHA-2 hash family standard using FPGAs
• scientific article; zbMATH DE number 1941110
• RIPEMD-160: a strengthened version of RIPEMD
• Fast hashing on the Pentium

Cited in

(2)

• Non-wafer-Scale Sieving Hardware for the NFS: Another Attempt to Cope with 1024-Bit
• scientific article; zbMATH DE number 1941128 (Why is no real title available?)

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