Multicast-Based Testing and Thermal-Aware Test Scheduling for 3D ICs with a Stacked Network-on-Chip

DOI10.1109/TC.2015.2493548MaRDI QIDQ2985288zbMATH OpenOpenAlexFDO

Authors Dong Xiang, Krishnendu Chakrabarty, Hideo Fujiwara

Publication date 16 May 2017

Published in IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1109/tc.2015.2493548

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20)

Cited in

(2)

• Exact Wirelength of Embedding 3-Ary n-Cubes into Certain Cylinders and Trees
• All-to-all broadcast in dragonfly networks

This page was built for publication: Multicast-Based Testing and Thermal-Aware Test Scheduling for 3D ICs with a Stacked Network-on-Chip

Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q2985288)