Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control

DOI10.1142/S0218127417500407zbMATH Open1360.65030OpenAlexW2606334304MaRDI QIDQ2986000FDOQ2986000

Authors: Mo Qiu, Simin Yu, Yuqiong Wen, Jin-Hu Lü, Jianbin He, Zhuosheng Lin 

Publication date: 11 May 2017

Published in: International Journal of Bifurcation and Chaos in Applied Sciences and Engineering (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1142/s0218127417500407

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zbMATH Keywords

fixed-point algorithmchaotic systemFPGA implementationstate machine controlverilog HDL

Mathematics Subject Classification ID

Random number generation in numerical analysis (65C10) Strange attractors, chaotic dynamics of systems with hyperbolic behavior (37D45) Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

Cites Work

• FPGA realization of multi-scroll chaotic oscillators
• FPGA realization of a chaotic communication system applied to image processing
• A new auto-switched chaotic system and its FPGA implementation

Cited In (4)

• Mechanics analysis and hardware implementation of a new 3D chaotic system
• FPGA implementation of public-key cryptography based on chaotic attractors of neural networks
• Title not available (Why is that?)
• An FPGA real-time implementation of the Chen's chaotic system for securing chaotic communications

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