Design and FPGA Implementation of a Universal Chaotic Signal Generator Based on the Verilog HDL Fixed-Point Algorithm and State Machine Control

DOI10.1142/S0218127417500407MaRDI QIDQ2986000zbMATH OpenOpenAlexFDO

Authors Mo Qiu, Simin Yu, Yuqiong Wen, Jin-Hu Lü, Jianbin He, Zhuosheng Lin

Publication date 11 May 2017

Published in International Journal of Bifurcation and Chaos in Applied Sciences and Engineering (Search for Journal in Brave)

Full work available at URL https://doi.org/10.1142/s0218127417500407

zbMATH Keywords

fixed-point algorithmchaotic systemFPGA implementationstate machine controlverilog HDL

Mathematics Subject Classification ID

Random number generation in numerical analysis (65C10) Strange attractors, chaotic dynamics of systems with hyperbolic behavior (37D45) Data encryption (aspects in computer science) (68P25) Cryptography (94A60)

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• FPGA realization of a chaotic communication system applied to image processing
• FPGA realization of multi-scroll chaotic oscillators

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