Analysis and synthesis of clock generator

zbMATH Open1234.93047MaRDI QIDQ3000978FDOQ3000978

Authors: G. A. Leonov, S. M. Seledzhi, Elena V. Kudryashova, N. V. Kuznetsov, P. Neittaanmäki 

Publication date: 31 May 2011

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zbMATH Keywords

bifurcationdelay lineDPLLclock generator

Mathematics Subject Classification ID

Synthesis problems (93B50) Linear systems in control theory (93C05) Control/observation systems governed by ordinary differential equations (93C15)

Cited In (3)

• Analysis and synthesis of controlled delay lines for fast digital devices
• Analysis and synthesis of controlled delay lines for fast digital devices
• Analysis and synthesis of controlled delay lines

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