Decidability of LTL for vector addition systems with one zero-test
DOI10.1007/978-3-642-24288-5_9zbMATH Open1348.68157OpenAlexW32620562MaRDI QIDQ3172867FDOQ3172867
Publication date: 7 October 2011
Published in: Lecture Notes in Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1007/978-3-642-24288-5_9
Specification and verification (program logics, model checking, etc.) (68Q60) Decidability of theories and sets of sentences (03B25) Temporal logic (03B44) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)
Cited In (2)
Uses Software
Recommendations
- Model checking vector addition systems with one zero-test ๐ ๐
- The Reachability Problem for Vector Addition System with One Zero-Test ๐ ๐
- Place-boundedness for vector addition systems with one zero-test ๐ ๐
- Mixing coverability and reachability to analyze VASS with one zero-test ๐ ๐
- Model Checking Coverability Graphs of Vector Addition Systems ๐ ๐
This page was built for publication: Decidability of LTL for vector addition systems with one zero-test
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3172867)