FPGA implementation of pairings using residue number system and lazy reduction

DOI10.1007/978-3-642-23951-9_28zbMATH Open1285.94048OpenAlexW2097953324MaRDI QIDQ3172983FDOQ3172983

Authors: Ray C. C. Cheung, Sylvain Duquesne, Junfeng Fan, Nicolas Guillermin, Ingrid Verbauwhede, Gavin Xiaoxu Yao 

Publication date: 7 October 2011

Published in: Cryptographic hardware and embedded systems -- CHES 2011. 13th international workshop, Nara, Japan, September 28--October 1, 2011. Proceedings (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1007/978-3-642-23951-9_28

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zbMATH Keywords

FPGAResidue Number SystemLazy ReductionOptimal Pairing

Mathematics Subject Classification ID

Cryptography (94A60)

Cited In (13)

• Optimal Eta Pairing on Supersingular Genus-2 Binary Hyperelliptic Curves
• An FPGA systolic array using pseudo-random bit generators for computing Goldbach partitions
• Choosing and generating parameters for pairing implementation on BN curves
• Finite field arithmetic in large characteristic for classical and post-quantum cryptography
• Updating key size estimations for pairings
• Direct Implementation of Discrete and Residue-Based Functions Via Optimal Encoding: A Programmable Array Logic Approach
• Parallelizing the Weil and Tate pairings
• A survey of fault attacks in pairing based cryptography
• RNS arithmetic in \(\mathbb F_{p^{k}}\) and application to fast pairing computation
• Implementing optimized pairings with elliptic nets
• Faster pairing coprocessor architecture
• Highly parallel modular multiplier for elliptic curve cryptography in residue number system
• Towards Faster and Greener Cryptoprocessor for Eta Pairing on Supersingular Elliptic Curve over $\mathbb{F}_{2^{1223}}$

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