FPGA and ASIC implementations of the \(\eta _T\) pairing in characteristic three
DOI10.1016/j.compeleceng.2009.05.001zbMath1192.68235OpenAlexW2116492304MaRDI QIDQ962585
Akira Kanaoka, Masahiro Mambo, Ryuji Soga, Jean-Luc Beuchat, Masaaki Shirase, Piseth Ith, Hiroshi Doi, Eiji Okamoto, Ananda Vithanage, Masayoshi Katouno, Takaaki Shiga, Takeshi Okamoto, Kaoru Fujita, Hiroyasu Yamamoto, Atsuo Inomata, Tsuyoshi Takagi
Publication date: 7 April 2010
Published in: Computers and Electrical Engineering (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.compeleceng.2009.05.001
elliptic curve cryptographyTate pairingfinite field arithmetichardware accelerator\(\eta _T\) pairing
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