Parallel Parsing Algorithms and VLSI Implementations for Syntactic Pattern Recognition
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Publication:3311705
DOI10.1109/TPAMI.1984.4767522zbMath0529.68061WikidataQ52695228 ScholiaQ52695228MaRDI QIDQ3311705
No author found.
Publication date: 1984
Published in: IEEE Transactions on Pattern Analysis and Machine Intelligence (Search for Journal in Brave)
Earley's algorithm; syntactic pattern recognition; VLSI array; error-correcting recognition; parallel CFL parsing; parallel CFL recognition; parsing matrix
68T10: Pattern recognition, speech recognition
68N20: Theory of compilers and interpreters
68N25: Theory of operating systems
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