A Class of Odd-Weight-Column SEC-DED-SbED Codes for Memory System Applications
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Publication:3331132
DOI10.1109/TC.1984.5009359zbMath0542.94017MaRDI QIDQ3331132
Publication date: 1984
Published in: IEEE Transactions on Computers (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1109/tc.1984.5009359
reliability; LSI implementation; byte-organized memory chips; SEC-DED-SbED codes; single-bit error correcting-double-bit error detecting-single-b-bit byte error detecting codes
94B99: Theory of error-correcting codes and error-detecting codes
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