The VLSI Implementation of a Reed—Solomon Encoder Using Berlekamp's Bit-Serial Multiplier Algorithm

DOI10.1109/TC.1984.1676351zbMath0545.94015MaRDI QIDQ3337374

Chiunn- Shyong Yeh, Leslie J. Deutsch, In-Shek Hsu, Ke Wang, Irving S. Reed, Trieu-Kien Truong

Publication date: 1984

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

zbMATH Keywords

VLSIReed-Solomon codedual basisBerlekamp's bit-serial multiplier

Mathematics Subject Classification ID

Related Items (1)

Design of a linear systolic array for computing modular multiplication and squaring in \(\text{GF}(2^m)\)

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