A novel approach to hedge and compensate the critical dimension variation of the developed-and-etched circuit patterns for yield enhancement in semiconductor manufacturing
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Publication:337307
DOI10.1016/j.cor.2014.05.009zbMath1348.90439OpenAlexW2068395870MaRDI QIDQ337307
Publication date: 10 November 2016
Published in: Computers \& Operations Research (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.cor.2014.05.009
critical dimensionfeed-forward controlmanufacturing intelligencerun-to-run (R2R)tool affinitytool dispatchingyield enhancement
Programming involving graphs or networks (90C35) Production models (90B30) Case-oriented studies in operations research (90B90)
Cites Work
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- Multiple-objective scheduling and real-time dispatching for the semiconductor manufacturing system
- Rule-based scheduling in wafer fabrication with due date-based objectives
- Heuristic scheduling of jobs on parallel batch machines with incompatible job families and unequal ready times
- A novel timetabling algorithm for a furnace process for semiconductor fabrication with constrained waiting and frequency-based setups
- Constructing the OGE for promoting tool group productivity in semiconductor manufacturing
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