Functional Verification of Programmable Embedded Architectures

DOI10.1007/B137514MaRDI QIDQ3377010zbMATHOpenAlexFDO

Authors Prabhat K. Mishra, Nikil Dutt

Publication date 27 March 2006

Full work available at URL https://doi.org/10.1007/b137514

zbMATH Keywords

Validation of programmable architectures

Mathematics Subject Classification ID

Introductory exposition (textbooks, tutorial papers, etc.) pertaining to computer science (68-01) Mathematical problems of computer architecture (68M07)

Recommendations

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Cited in

(7)

• Metamodeling-driven IP reuse for SoC integration and microprocessor design.
• System-on-a-chip verification. Methodology and techniques
• Post-silicon and runtime verification for modern processors
• An architectural approach to the analysis, verification and validation of software intensive embedded systems
• Abstract Interpretation of the Physical Inputs of Embedded Programs
• System-level validation. High-level modeling and directed test generation techniques.
• Digital hardware/software-systems. Specification and verification.

Describes a project that uses

Uses Software

• ISDL

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