Permissiveness in Transactional Memories
DOI10.1007/978-3-540-87779-0_21zbMATH Open1161.68387OpenAlexW1597783682MaRDI QIDQ3540238FDOQ3540238
Authors: Vasu Singh, Rachid Guerraoui, Thomas A. Henzinger 
Publication date: 20 November 2008
Published in: Lecture Notes in Computer Science (Search for Journal in Brave)
Full work available at URL: https://infoscience.epfl.ch/record/125702/files/main.pdf
Recommendations
Mathematical aspects of software engineering (specification, verification, metrics, requirements, etc.) (68N30) Models and methods for concurrent and distributed computing (process algebras, bisimulation, transition nets, etc.) (68Q85)
Cites Work
Cited In (13)
- Correctness of concurrent executions of closed nested transactions in transactional memory systems
- On speculative replication of transactional systems
- HiperTM: high performance, fault-tolerant transactional memory
- Privatization-safe transactional memories
- A single-version STM that is multi-versioned permissive
- In the search for optimal concurrency
- Non-interference and local correctness in transactional memory
- On avoiding spare aborts in transactional memory
- Towards a universal construction for transaction-based multiprocess programs
- Inherent limitations on disjoint-access parallel implementations of transactional memory
- Achieving starvation-freedom with greater concurrency in multi-version object-based transactional memory systems
- Last-use opacity: a strong safety property for transactional memory with prerelease support
- Perspectives on Transactional Memory
This page was built for publication: Permissiveness in Transactional Memories
Report a bug (only for logged in users!)Click here to report a bug for this page (MaRDI item Q3540238)
