Asymptotic Performance Limits of Switches With Buffered Crossbars Supporting Multicast Traffic

DOI10.1109/TIT.2007.913564zbMATH Open1309.68016MaRDI QIDQ3604725FDOQ3604725

Authors: Emilio Leonardi, P. Giaccone 

Publication date: 24 February 2009

Published in: IEEE Transactions on Information Theory (Search for Journal in Brave)

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zbMATH Keywords

schedulingpacket switchingmulticast trafficbuffered crossbars

Mathematics Subject Classification ID

Performance evaluation, queueing, and scheduling in the context of computer systems (68M20) Mathematical problems of computer architecture (68M07)

Cited In (6)

• Integration of unicast and multicast scheduling in input-queued packet switches
• The limits of input-queued switch performance with future packet arrival information.
• Title not available (Why is that?)
• High-performance switching based on buffered crossbar fabrics
• Multicast support in multi-chip centralized schedulers in input queued switches
• Performance analysis of clock-regulated queues with output multiplexing in three different 2x2 crossbar switch architectures

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