A matrix method for PLD failure localization

DOI10.1134/S0005117913090087zbMATH Open1334.94110OpenAlexW2070492667MaRDI QIDQ386929FDOQ386929

Authors: G. P. Aksenova 

Publication date: 11 December 2013

Published in: Automation and Remote Control (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1134/s0005117913090087

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Mathematics Subject Classification ID

Fault detection; testing in circuits and networks (94C12) Computer system organization (68M99)

Cites Work

• A low hardware overhead self-diagnosis technique using reed-solomon codes for self-repairing chips

Cited In (4)

• Localization of faulty multi-output unit in discrete device
• Time Redundant Fault-Location in Bit-Sliced ALU's
• Increasing resolvability for the matrix fault localization method
• Localization of multiple faults with group control on a discrete device

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