MR4UM: a framework for adding fault tolerance to UML state diagrams

DOI10.1016/j.tcs.2012.10.005zbMath1294.68043OpenAlexW2088452584MaRDI QIDQ391245

Jingshu Chen, Sandeep S. Kulkarni

Publication date: 10 January 2014

Published in: Theoretical Computer Science (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.tcs.2012.10.005

zbMATH Keywords

fault tolerancefault modelingmodel revisionmodel-based design

Mathematics Subject Classification ID

Application models in control theory (93C95) Adaptive control/observation systems (93C40) Specification and verification (program logics, model checking, etc.) (68Q60) Reliability, testing and fault tolerance of networks and computer systems (68M15)

Related Items (1)

Automation of fault-tolerant graceful degradation

Uses Software

• SPIN
• Uppaal
• MR4UM
• Sycraft
• Vertaf

Cites Work

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• Using branching time temporal logic to synthesize synchronization skeletons
• Symbolic model checking: \(10^{20}\) states and beyond
• Uppaal in a nutshell
• Synthesis of fault-tolerant concurrent programs
• From MITL to Timed Automata
• The benefits of relaxing punctuality
• Computer Aided Verification
• CONCUR 2003 - Concurrency Theory
• Computer Aided Verification

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