The weakest failure detector to implement a register in asynchronous systems with hybrid communication
DOI10.1016/J.TCS.2012.06.030zbMATH Open1358.68039OpenAlexW1994382507MaRDI QIDQ392012FDOQ392012
Publication date: 13 January 2014
Published in: Theoretical Computer Science (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.tcs.2012.06.030
fault-tolerancedistributed algorithmfailure detectorprocess crashasynchronous message-passing systematomic registerhybrid communicationnecessity proofshared memory systemweakest failure detector
Reliability, testing and fault tolerance of networks and computer systems (68M15) Distributed algorithms (68W15) Distributed systems (68M14)
Cites Work
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Cited In (2)
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