On algorithms in the parallel design of logic and layout of circuits with functional blocks

DOI10.1002/CTA.4490200407zbMATH Open0825.94293OpenAlexW2051700386MaRDI QIDQ4030461FDOQ4030461

Authors: Péter Szolgay 

Publication date: 1 April 1993

Published in: International Journal of Circuit Theory and Applications (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1002/cta.4490200407

Mathematics Subject Classification ID

Cites Work

• An Efficient Heuristic Procedure for Partitioning Graphs

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