On the Design of Logic Networks with Redundancy and Testability Considerations

DOI10.1109/T-C.1974.223821zbMath0289.94019OpenAlexW2038494392MaRDI QIDQ4041454

Sudhakar M. Reddy, Ramaswami Dandapani

Publication date: 1974

Published in: IEEE Transactions on Computers (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1109/t-c.1974.223821

Mathematics Subject Classification ID

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