Delay fault models for VLSI circuits
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Publication:4225360
DOI10.1016/S0167-9260(98)00019-4zbMath0908.68014MaRDI QIDQ4225360
Sudhakar M. Reddy, Irith Pomeranz
Publication date: 12 January 1999
Published in: Integration (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/s0167-9260(98)00019-4
68M99: Computer system organization