A hardware-friendly arithmetic method and efficient implementations for designing digital fuzzy adders

DOI10.1016/J.FSS.2011.06.006zbMATH Open1238.94042OpenAlexW2091172051MaRDI QIDQ423136FDOQ423136

Akbar Doostaregan, Omid Hashemipour, Mohammad Hossein Moaiyeri, Keivan Navi

Publication date: 18 May 2012

Published in: Fuzzy Sets and Systems (Search for Journal in Brave)

Full work available at URL: https://doi.org/10.1016/j.fss.2011.06.006

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zbMATH Keywords

fuzzy hardwaredigital fuzzy setsfull addermultiple-valued logic (MVL)radix-\(r\)

Mathematics Subject Classification ID

Fuzzy sets and logic (in connection with information, communication, or circuits theory) (94D05)

Cites Work

• Fuzzy sets
• Examples of fuzzy metrics and applications
• A VLSI design of fuzzy register
• Design of an analog CMOS fuzzy logic controller chip
• Attribute reduction based on generalized fuzzy evidence theory in fuzzy decision systems
• Ternary logic in parallel multipliers
• Designing sequential systems with fuzzy J-K flip-flops
• The potential of fuzzy neural networks in the realization of approximate reasoning engines

Cited In (2)

• Parallel, asynchronous, fuzzy logic systems realized in CMOS technology
• Title not available (Why is that?)

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