A two-stage hardware scheduler combining greedy and optimal scheduling
DOI10.1016/J.JPDC.2008.07.008zbMATH Open1243.68111OpenAlexW1982009164MaRDI QIDQ436901FDOQ436901
Authors: Raymond R. Hoare, Zhu Ding, Alex K. Jones 
Publication date: 26 July 2012
Published in: Journal of Parallel and Distributed Computing (Search for Journal in Brave)
Full work available at URL: https://doi.org/10.1016/j.jpdc.2008.07.008
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Cites Work
- Matching is as easy as matrix inversion
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- Distributed algorithm for approximating the maximum matching
- Matrices Associated With the Hitchcock Problem
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- Efficient time slot assignment algorithms for TDM hierarchical and nonhierarchical switching systems
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