A two-stage hardware scheduler combining greedy and optimal scheduling (Q436901)
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scientific article
| Language | Label | Description | Also known as |
|---|---|---|---|
| English | A two-stage hardware scheduler combining greedy and optimal scheduling |
scientific article |
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A two-stage hardware scheduler combining greedy and optimal scheduling (English)
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26 July 2012
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maximum matching
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time division multiplexing
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circuit switching
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large cardinality cross bar
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scheduling
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hardware acceleration
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