A note on architectures for large-capacity CAMs

DOI10.1016/S0167-9260(97)00010-2zbMATH Open0894.68014MaRDI QIDQ4397101FDOQ4397101

Authors: Behrooz Parhami 

Publication date: 30 June 1998

Published in: Integration (Search for Journal in Brave)

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zbMATH Keywords

classificationassociative memoryVLSI architecturescontent-addressable memoryserial/parallel implementationstaxonomy for CAMs

Mathematics Subject Classification ID

Parallel algorithms in computer science (68W10) Computer system organization (68M99)

Cited In (1)

• Content-addressable memory core cells A survey

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